The semiconductor device industry continually strives to manufacture smaller and faster integrated circuits in an effort to satisfy the insatiable demand for electronic products. In order to timely meet this demand with reliable IC's, device manufacturers are forced to verify the integrity and operability of each device. Consequently, a critical process involved in the successful manufacture of IC's relates to functional and structural test of each IC device.
To carry out the functional and structural tests of individual IC's, those skilled in the art often employ automatic test equipment. Commonly referred to as "testers", the equipment applies precisely timed signal patterns or vectors to the input pins of a device-under-test (DUT), while capturing output signals from the output pins of the DUT. The output signals are compared to expected parameters resident in a memory to determine whether the IC has any functional or structural faults.
Conventional testers typically include a computer-driven test controller that issues commands to a tester interface or test head. The test head includes pin electronics that generate and send test patterns or vectors along a plurality of signal channels coupled to the individual input and output pins of the DUT. To physically interface with the DUT, the tester interface includes an array of contacts or pogos that couple to mating contacts of a device-interface-board (DIB). The DUT mounts to a socket installed on the DIB.
While conventional testers work well for their intended purposes, advances in IC technology tend to lead advances in tester technology. For example, a trend in VLSI microprocessors involves implementing a high-speed 30 channel Rambus interface. Due to the high-frequency patterns required to drive signals through such an interface (approx. 1 Gigahertz), conventional testers have difficulty achieving the required timing accuracy of about 50 picoseconds. In this particular example, some of the inaccuracy results from impedance mismatches that occur when the pulse widths driven to or received from the DUT are less than the round-trip-delay (RTD) from the tester drive/compare node to the DUT pin.
Similar problems result from other specialized DUT pins such as unexpectedly high or low voltage levels, and relatively fast or slow pattern rise-times. Thus, the key problem involves the inability for conventional testers to adapt to special DUT pins in a cost-effective and practical manner.
One conventional, and costly, technique for adapting a conventional tester to a modified DUT involves customizing the device-interface-board that mounts the DUT. Commonly referred to as a "loadboard", the custom DIB employs special circuitry permanently fixed to the DIB and controlled by the user to interface the special DUT pins to the tester. Although this solution permits testing of the DUT by the conventional tester, limitations on the area of the DIB limits the amount of custom circuitry that can be installed. Consequently, only a few specialized DUT pins may be supported with the loadboard technique. Additionally, the calibration between the custom circuitry on the loadboard and the tester becomes problematic since the DIB is typically fabricated and controlled by the user.
Therefore, the need exists for a tester having the capability of selectively testing specialized pins of a DUT without the burden of customizing respective DIBs. Moreover, the need exists for a remote test module that adapts a tester to a multitude of DUTs having varying specialized test requirements, without the need for separate testers. The remote test module of the present invention satisfies these needs.